The present invention relates to plated through vias in voltage divider regions of a printed circuit board (“PCB”), and more particularly to identifying and resolving issues with placement thereof.
A via is an electrical connection between layers of a printed circuit board (“PCB”). A through via is formed by creating a hole through the layers of the PCB, for example by drilling or through use of a laser. A plated through via (“PTV”), sometimes referred to as a plated through hole (“PTH”), is a via that connects pads placed in corresponding positions on layers of the PCB electrically, for example by electroplating or by filling the drilled hole with a conductive tube that is commonly referred to as a “barrel”.